| Jun Yan |
| Electrical and Computer Enigneering |
| Southern Illinois University Carbondale |
| Email: juny@siu.edu |
| Phone: 618-453-7850 |
| Office: E0127 |
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| Education |
| PhD of Science (Jan.2005 ~ present) |
| Department of Electrical and Computer Engineering, Southern Illinois University-Carbondale (SIUC), USA Jan.2005 ~ present |
| Master of Science (Apr. 2002) |
| College of Automation, Tianjin University, China Sep.1999~Apr.2002 |
| Bachelor of Science (Jul. 1998) |
| Department of Automation, Shenyang Architecture and Civil Engineering Institute, China, Sep.1994~Jul.1998 |
| Research |
| Multi-Core Architecture WCET analysis |
| VLIW Architecture WCET analysis |
| VLIW Architecture |
| Working Experience |
| Lucent Technologies Co., LTD. Bell Labs (12/2003~12/2004) |
| Huawei Technologies Co., LTD. R&D (04/2002-12/2003 ) |
| Publications |
| Journal Papers |
J. Yan, W. Zhang. Evaluating instruction cache vulnerability to transient errors. To appear in special issue of ACM SIGARCH Computer Architecture News, 2007. |
J. Yan, W. Zhang. Hybrid multi-core architecture for boosting single-threaded performance. In ACM SIGARCH Computer Architecture News, Vol. 34, No. 1, pp. 141-148, March 2007. |
Conference and Workshop Papers |
WCET analysis of instruction caches with prefetching, J. Yan, W. Zhang, In Proc. of the ACM SIGPLAN/SIGBED 2007 Conference on Languages, Compilers, and Tools for Embedded Systems, June 2007. |
Virtual registers: reducing register pressure without enlarging the register file, J. Yan, W. Zhang, To Appear In Proc. of the 2007 International Conference on High Performance Embedded Architectures & Compilers, January 2007. |
WCET Analysis of time-predictable VLIW processors, J. Yan, W. Zhang, To Appear in Work-in-Progress (WIP) session of The 27th IEEE Real-Time Systems Symposium, December 2006. |
Compiler-Guided Register Reliability Improvement against Soft Errors, J. Yan and W. Zhang, In Proc. of the ACM Conference on Embedded Software (EMSOFT), Sep. 2005. |
Enhancing register file reliability through compiler-based approaches, J. Yan, W. Zhang, In Proc. of the second IBM Watson Conference on Interaction between Architecture, Circuits, and Compilers (PAC'2), pages 170-177, Sep, 2005. |